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george__

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Everything posted by george__

  1. I am running some simulations, I made a copy of a file and changed one component (the optimizer used). The simulation worked for some files, but for larger systems, I received the following error when trying to simulate: "Access violation at address 00B8877F in module 'Pvsyst6.exe'. Read of address 000000089 DateSim = 05/01/90 10:00 " Is there any way to resolve this? Thank you, George
  2. Hi, Could someone please clarify the difference between these two parameters? As far as I understand, ShdElec is due to the electrical loss via shading (change in change in characteristic IV curve and operating point causes losses). MisLoss is the mismatch loss between panels: the panel with the lowest current is the driving current and hence causes losses due to mismatch. However, in my simulations, the MisLoss parameters stays more or less constant, regardless of how I vary the shading scene (even when there is no shading), what is the reason for this? Thank you in advance if anyone can shed some light on this issue!
  3. According to PVsyst's manual: "the I/V characteristics of the partially shaded sub-module is evaluated (10% cells shaded for 1 corner shaded, 1/3 for 2, 2/3 for 3, 100% for 4 corners). It is again an approximation, but when inserted in the I/V full array characteristics the electrical effect is about the same as soon as the sub-module is shaded." Full Calculations steps: http://files.pvsyst.com/help/near_shadings_electrical.htm I wanted to know what the 10%, 1/3 and 2/3 (in step 2) meant with reference to IV characteristics? P.S any explanation or further information on how PVsyst's calculation method would be much appreciated as I'm not sure I fully understood it.
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