Hi, I have found a possible bug in PVsyst v6: editing the Hidden PVsyst parameter, I have changed the value of "Limit overload loss for design" to a 5% value (default value for this parameter is 3%), as I did before in PVsyst v5. When I'm trying to simulate with an overload value over 3%, the following message is shown: "The inverter power is strongly undersized". The bug is that if I close PVsyst and run it again, the value of "Limit overload loss for design" has come back to 3% again, and other values are never taken into account, so I can not simulate my PV plant if this value is exceeded. Kind regards.