Long term IL_Vmin losses

[Gonzalo]

We have observed that system designs with no IL_Vmin losses year 1, can start incurring in losses in long term simulations (i.e. year 30) using the same MET file and losses profile (just changing year of simulation parameter).

At a theoretical level, we normally consider that the degradation is mostly happening in current and not in voltage inside the PV modules. 

What is the reason behind these losses appearing in long term simulations? Is there a way to change their behaviour? We normally set the voltage degradation dispersion as 0 (just for your information, although this should only impact the long term mismatch as per our understanding).

[André Mermoud]

We don't have much references about the I/V curves degradation. The different publications are very contradictory.  The Voc degradations is often reported as very low, but the Vmp is affected namely by the increase of the Series resitance. However it seems indeed that the degradation is mostly to be applied to the current Imp.

In PVsyst, you may modify the Current degradation sharing in the Advanced parameters,  topic  "System design loss parameters, losses, shadings", item "Long term Pmpp degradation, current sharing" (#611). The value is now 50%, we will consider putting a value of 70% or 80% for this parameter in a next version.

[Gonzalo]

Hello André,

Many thanks for your reply. It has been very helpful.

We will modify the indicated parameter to adjust the long term losses to our understanding.

Best Regards,

Gonzalo