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Posted

For most, if not all of our designs (Grid-Connected) we use the losses specified in our Design Standards, so for every project we would have to go to all taps (Thermal parameter, Ohmic losses, Model quality - LID Mismatch, etc) under "Detailed Losses" and enter these values per design standards. So, my question is, is it possible to set our Design Standards as the "default values" so that we do not have to enter them for each design? Or could we create a "Global Variant" with these settings so that these values are populated with design standards, hence no need to enter them again?

Thanks!

Posted

Some of these loss assumptions can be defined in advanced parameters from the main menu. When they are updated here, you can check the default box under Detailed losses to set them. Note that module quality factor (when using the default button) will take into account the tolerance assumption set in PVsyst and what is declared in the PAN file.

 

  • Default wiring resistance = DC loss

  • LID

  • mismatch

  • module quality loss

2022-02-11_14-44-41.thumb.png.49dc2c1a4b32fbb22c212c133ab314d8.png

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