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purnaanshg

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  1. Hi, If an inverter derates its power output after a certain high DC voltage level then how to provide that information in PVsyst so that it is taken into account during simulations and can be quantified from the results? Example: A 100kW inverter has an MPPT range from say 400Vdc to 700Vdc with a 0.333%/Vdc derating beyond 700Vdc. If this inverter is used in a 1000V array with a high DC to AC ratio then the voltage of the array is bound to go beyond 700V. Does PVsyst take into account this kind of inverter derating into account during simulations? Thanks Purnaansh
  2. Thanks Dr. Mermoud. "Using Master/Slave configuration is not harmless: it forces to connect all concerned sub-arrays in parallel. This is not necessarily a good idea.": Can you please shed more light on the disadvantages. I would still request the ability to set the # of Slaves to higher values because a PVsyst output is what we provide along with configuring our inverters while quoting for a project. It would be confusing for the clients where we are configuring 12 or more inverters for a project and explain why the PVsyst output consists of a configuration of 2x6 inverters and not 1x12 inverters which is actually being proposed for the quote. I would really appreciate this feature. Please let me know. Thanks Purnaansh
  3. Hi, I am using the Master/Slave configuration for inverters. I am using PVsyst 6.27. I am simulating a 12inverter configuration which would have 1 Master and 11 Slaves but the "Inverter Selection" does not allow me to go beyond 10 Slaves. Why is this so? Is there a way I can increase the number of slaves in the "Inverter Selection" beyond 10. Please let me know. Thanks Purnaansh
  4. Hi, I am trying to figure out a way to use multiple PV modules (Eg: Renesola 250W, Trina 230W, Canadian 300W) to design one site. These panels will be constitute separate strings (Eg: X strings of 20 Trina modules each, Y strings of 18 renesola modules each etcetra) Our inverter architecture is distributed with Master/Slave functionality and all these modules will be connecting to one island of "X" inverters with 1 master and "X-1" slaves. Can you please suggest a way to perform the simulation. Thanks Purnaansh
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