This representation is quite correct.
The efficiency is defined as the Pout / Pin ratio. Now if the Pout is limited to the PNom value, the efficiency Pout/Pin will obviously diminish above Pout, in the way shown on the graph.
Now for the "unreasonable" Overpower loss:
- Please remember that the value in the sizing tool is a rough pre-evaluation, just for helping you to design your system. The reliablel value is the result of the simulation.
See the FAQ Why the overload loss is not the same at designe time as in the simulation ?
- In some conditions (high array voltage), the overpower may significantly increase.
See the FAQ Why sometimes the overload losses increase significantly ?